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Delta-sigma modulator circuits in which DITHER is added to the quantization levels of methods of operating the same
 
   
Document Number
US Patent 7471223
Issued Date
December 30, 2008
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Inventors
Lee; Yong-Hee (Gyeonggi-do,KR)
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Abstract
A delta-sigma modulator circuit includes an n-level quantizer circuit that is configured to generate a quantized output signal responsive to an input signal. The n-level quantizer circuit includes n adder circuits that are configured to add a dither signal to n quantization levels to generate n dithered quantization levels, respectively and n comparator circuits that are configured to compare the input signal with the n dithered quantization levels to generate the quantized output signal.
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Number of Claims:
30
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Published
December 30, 2008
Application Number
11/506,515
Filed
August 18, 2006
US Classification
341/131   341/143 341/144 341/155
Int'l Classification
H03M   1/20   (20060101)  
Examiner
Priority Data
Aug 20, 2005 [KR] 10-2005-0076527
USPTO Field of Search
341/131   341/143   341/144   341/155  
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