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Preemptive write back controller
 
   
Document Number
US Patent 7472230
Issued Date
December 30, 2008
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Abstract
A preemptive write back controller is described. The present invention is well suited for a cache, main memory, or other temporarily private data storage that implements a write back strategy. The preemptive write back controller includes a list of the lines, pages, words, memory locations, or sets of memory locations potentially requiring a write back (i.e., those which previously experienced a write operation into them) in a write back cache, write back main memory, or other write back temporarily private data storage. Thus, the preemptive write back controller can initiate or force a preemptive cleaning of these lines, pages, words, memory locations, or sets of memory locations.
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Number of Claims:
60
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Published
December 30, 2008
Application Number
09/952,994
Filed
September 14, 2001
US Classification
711/143   711/118 711/128 711/133 711/135 711/137 711/141 711/142 711/160 711/E12.04
Int'l Classification
G06F   12/00   (20060101)  
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Assistant Examiner
USPTO Field of Search
711/141   711/142   711/143   711/144   711/145   711/146   711/141   711/142   711/143   711/144   711/145   711/146   711/128   711/130   711/133   711/135   711/136   711/137   711/141   711/142   711/143   711/144   711/145   711/146   711/160  
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