Integrated circuit bus integrity may be verified without specialized test equipment. In a diagnostic mode, the integrated circuit may output a series of predetermined activation patterns onto the data bus to verify integrity of the data bus. Further bus verification may be provided by an address capture mode where address bus contents are reflected onto the data bus. A microprocessor may control diagnostic mode operation.
RELATED APPLICATION
This patent application is a continuation of U.S. patent application Ser. No. 10/166,207, filed Jun. 10, 2002, issued as U.S. Pat. No. 7,076,711, which is incorporated herein by reference in its entirety.
