In one embodiment, a phase-change memory device has an oxidation barrier layer to protect against memory cell contamination or oxidation and a method of manufacturing the same. In one embodiment, a semiconductor memory device comprises a molding layer overlying a semiconductor substrate. The molding layer has a protrusion portion vertically extending from a top surface thereof. The device further includes a phase-changeable material pattern adjacent the protrusion portion and a lower electrode electrically connected to the phase-changeable material pattern.
CROSS-REFERENCE TO RELATED APPLICATION
The present application is a continuation-in-part of U.S. patent application Ser. No. 11/027,255, filed Dec. 30, 2004, now issued as U.S. Pat. No. 7,411,208, which claims priority from Korean Patent Application No. 2004-37965, filed on May 27, 2004. Also, the present application claims the priority from Korean Patent Application Nos. 2004-105905 and 2005-31662, filed Dec. 14, 2004 and Apr. 15, 2005, respectively. The disclosures of all of the above applications are incorporated herein by reference in their entirety.
Priority Data
May 27, 2004 [KR] 10-2004-0037965 Dec 14, 2004 [KR] 10-2004-0105905 Apr 15, 2005 [KR] 10-2005-0031662
