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Power efficient flow control model for USB asynchronous transfers
   
Document Number
US Patent 7490255
Issued Date
February 10, 2009
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Abstract
Embodiments comprising a memory and a USB host controller coupled to the memory. The power efficiency of a USB during asynchronous transfers is increased by limiting usage of an asynchronous schedule stored in the memory when servicing a scheduled asynchronous transfer endpoint. Other embodiments may be described and claimed.
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Number of Claims:
28
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Owner
Intel Corporation (Santa Clara, CA)
Published
February 10, 2009
Application Number
11/428,266
Filed
June 30, 2006
US Classification
713/320   710/100
Int'l Classification
G06F   1/32   (20060101)   G06F   13/00   (20060101)  
Examiner
Assistant Examiner
USPTO Field of Search
713/320   710/100  
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