A non-volatile memory cell utilizes a programmable conductor random access memory (PCRAM) structure instead of a polysilicon layer for a floating gate. Instead of storing or removing electrons from a floating gate, the programmable conductor is switched between its low and high resistive states to operate the flash memory cell. The resulting cell can be erased faster and has better endurance than a conventional flash memory cell.
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is a continuation of U.S. patent application Ser. No. 11/143,729, filed Jun. 3, 2005 now U.S. Pat. No. 7,276,722, which is a continuation of U.S. patent application Ser. No. 10/663,741, filed Sep. 17, 2003, which issued as U.S. Pat. No. 6,903,361, the disclosures of both applications are incorporated in their entirety by reference herein.
