A readout circuit of an imager that enables analog-to-digital converters (ADCs) to be shared between columns of the imager is provided. Groups of ADCs share a single block of memory for storing signals processed by the ADCs. The ADCs process signals received from one group of columns of pixels and, at a different time, the ADCs process signals from another group of columns of pixels. While one of the signals processed from a column is being stored in a first memory bank, signals previously processed and stored in a second memory bank are being readout of the storage locations and provided downstream for further processing.
CROSS REFERENCE TO RELATED APPLICATIONS
This application is a continuation of U.S. patent application Ser. No. 11/170,096, filed on Jun. 30, 2005 now U.S. Pat. No. 7,283,080, which claims priority to United Kingdom patent application 0506417.5 filed on Mar. 30, 2005, both of which are incorporated by reference in its entirety.
