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Cache memory system and control method of the cache memory system
   
Document Number
US Patent 7493445
Issued Date
February 17, 2009
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Inventors
Harada; Nobuyuki (Kanagawa-ken,JP)
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Abstract
To improve the efficiency of access to a system memory associated with changes (writes) to cache data, a cache line having the same memory size as write data is selected and the write data is written into the selected cache line, thereby reducing the number of accesses to the system memory to cache data from the system memory associated with partial replacement of cache lines. Further, valid data at an address contiguous with the address of the write data is combined with the write data, and written into a cache line having the same size as the combined data, thereby reducing the number of accesses to the system memory to flush data from the cache associated with writes to the cache.
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Number of Claims:
15
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Published
February 17, 2009
Application Number
11/162,509
Filed
September 13, 2005
US Classification
711/118   711/133 711/141
Int'l Classification
G06F   12/00   (20060101)  
Examiner
Assistant Examiner
Attorney/Law Firm
Priority Data
Sep 13, 2004 [JP] 2004-265431
USPTO Field of Search
711/118  
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