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Data and instruction address compression
 
   
Document Number
US Patent 7496902
Issued Date
February 24, 2009
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Abstract
An improved method, apparatus, and computer instructions for compressing trace data. An instruction stream is identified, and in response to identifying the instruction stream, the instruction addresses in the instruction stream are replaced with a stream identifier to form compressed trace data. Data addresses may be related to instructions in the instruction stream to generate a data trace component in the compressed trace data.
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Number of Claims:
9
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Published
February 24, 2009
Application Number
11/083,229
Filed
March 17, 2005
US Classification
717/128   714/45
Int'l Classification
G06F   9/44   (20060101)  
Assistant Examiner
USPTO Field of Search
714/45   717/128  
Related Patents
7581144 - Microprocessor and processing method thereof - Owned by Kabushiki Kaisha Toshiba (Tokyo,JP)

A microprocessor a microprocessor includes: a processor module executing an instruction to generate trace information including the information of the kind and the length of the instruction; an application processing circuit operating in cooperation with the processor module to process a specific application; an address calculating circuit calculating an execution address for executing the instruction based on the information of the instruction length; a data obtaining circuit obtaining data from the application processing circuit when the calculated execution address is located within a range of a designated address; and a trace memory in which the obtained data is stored together with the trace information.

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Description
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