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N-way set associative cache memory and control method thereof
   
Document Number
US Patent 7502887
Issued Date
March 10, 2009
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Abstract
The cache memory in the present invention is an N-way set-associative cache memory including a control register which indicates one or more ways among N ways, a control unit which activates the way indicated by said control register, and an updating unit which updates contents of said control register. The control unit restricts at least replacement, for a way other than the active way indicated by the control register.
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Number of Claims:
23
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Owner
Published
March 10, 2009
Application Number
10/578,314
Filed
September 8, 2004
US Classification
711/128   711/118 711/135
Int'l Classification
G06F   13/00   (20060101)   G06F   12/00   (20060101)  
Examiner
Assistant Examiner
Attorney/Law Firm
Priority Data
Nov 12, 2003 [JP] 2003-382570
USPTO Field of Search
711/128   711/118   711/135  
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