A semiconductor device and manufacturing method thereof include a semiconductor substrate, an interlevel dielectric (ILD) layer formed on the semiconductor substrate, a first contact stud formed in the ILD layer, having a width of an entrance portion adjacent to the surface of the ILD layer larger than the width of a contacting portion adjacent to the semiconductor substrate, and a second contact stud spaced apart from the first contact stud and formed in the ILD layer. The semiconductor device further includes a landing pad formed on the ILD layer to contact the surface of the second contact stud, having a width larger than that of the second contact stud. The second contact stud has a width of a contacting portion that is the same as that of an entrance portion. Also, at least one spacer comprising an etch stopper material is formed on the sidewalls of the landing pad and the etch stopper is formed on the landing pad. The entrance portion of the first contact stud has a width about 30-60% larger than that of the contacting portion.
RELATED APPLICATIONS
This application is a divisional of U.S. application Ser. No. 09/999,104, filed Oct. 31, 2001 now U.S. Pat. No. 6,836,019, which relies for priority upon Korean patent application number 01-6123, filed Feb. 8, 2001, the contents of which are herein incorporated by reference in their entirety.
