A logical simulation device executes simulation, based on cycle, using level sort and compile methods. In order to realize the high speed of the entire system in a practically usable scale, the system comprises a lot of processors, each capable of performing an evaluation process of executing simulation using a logical block corresponding to one or more gates as an evaluation unit, and a communication process with the other processors. A plurality of processors constitute a processor group, and a plurality of processor groups are connected to each other to form a tree-shaped hierarchy.
CROSS REFERENCE TO RELATED APPLICATION
This application is a continuation of international PCT application No. PCT/JP2002/013823 filed on Dec. 27, 2002.
