An analog-to-digital converter apparatus for analog source signals of one polarity, includes one comparator formed from transistors, a block of digitally addressable voltage sources to set a reference voltage of the comparator, an asynchronous n-bit digital counter, a block of digitally addressable voltage sources to set the potential to be applied to the signal source, a digital control unit, a block storing the calibration data for an input capacitor of the comparator, and a base-2 multiplier block, being interconnected by lines, including a line connecting the input analog signal to the drain of a pass transistor, a line connecting the block of voltage sources to be connected to the signal source, a line connecting the digital control unit to transistor gates, and a line carrying the signal Vref from the block of digitally addressed voltage sources to the comparator.
The present application is a continuation-in-part (CIP) of U.S. patent application Ser. No. 11/418,119 filed May 5, 2005, now U.S. Pat. No. 7,319,423, which is a CIP of U.S. patent application Ser. No. 10/522,805 filed Aug. 19, 2005, now U.S. Pat. No. 7,068,206, which is a 371 of PCT/EP2003/008642 filed Jul. 31, 2003, which claims benefit of U.S. provisional application 60/400,178 filed Jul. 31, 2002.
