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Document Number
US Patent 7521122
Issued Date
April 21, 2009
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Abstract
A laminated sheet for adhering to a circuit side of a projected electrode-mounting wafer in a step of grinding a backside of the wafer, wherein the laminated sheet comprises at least a layer (layer A) contacting with the circuit side, made of a thermosetting resin, a layer (layer B) directly laminated on the layer A, made of a thermoplastic resin having a tensile modulus of from 1 to 300 MPa at 40.degree. to 80.degree. C., and an outermost layer (layer C) made of a thermoplastic resin which is non-plastic at a temperature of at least 25.degree. C.; A method for manufacturing a semiconductor device, comprising the steps of grinding a backside of a projected electrode-mounting wafer wherein the laminated sheet is adhered to a circuit side of the wafer, removing other layers besides the layer A of the laminated sheet, and cutting the wafer into individual chips; and a semiconductor device obtainable by the method.
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Number of Claims:
6
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Owner
Nitto Denko Corporation (Ibaraki-shi,JP)
Published
April 21, 2009
Application Number
10/876,651
Filed
June 28, 2004
US Classification
428/423.1   29/592.1 428/195.1 428/212 428/336 428/423.7 428/620 438/460
Int'l Classification
B32B   27/00   (20060101)   H01L   21/00   (20060101)  
Examiner
Assistant Examiner
Priority Data
Jul 11, 2003 [JP] 2003-196113
USPTO Field of Search
428/423.1   428/195.1   428/336   428/423.7   428/620   428/212   29/592.1   438/460  
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