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Channel masking during integrated circuit testing
   
Document Number
US Patent 7523370
Issued Date
April 21, 2009
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Inventors
Keller; Brion (Binghamton, NY)
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Abstract
During testing of an integrated circuit (IC), a channel masking capability is used for masking out unknown or unpredictable (X) values from being compressed into a signature register. The approach provides flexibility to allow for masking of unknown values, while avoiding many of the problems caused by over-masking of known values. The circuitry added to the design to allow for masking is reasonably small, and provides an effective way of masking unknown values during the testing process.
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Number of Claims:
42
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Owner
Published
April 21, 2009
Application Number
10/942,741
Filed
September 15, 2004
US Classification
714/726   714/729
Int'l Classification
G01R   31/28   (20060101)  
Examiner
Assistant Examiner
Attorney/Law Firm
Parent Case
CROSS-REFERENCED AND RELATED APPLICATIONS This application claims the benefit of U.S. Provisional Application 60/503,191, filed on Sep. 15, 2003 which is hereby incorporated by reference as if fully set forth herein.
USPTO Field of Search
714/726   714/729  
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