A digital to analog converter is provided comprising a charge sharing circuit, a discharging circuit and a voltage boosting circuit. The charge sharing circuit sequentially receives first to (N-1)th bits of serial digital signals. The charge sharing circuit shares and stores charges between a first capacitor and a second capacitor according to a charging voltage, a ground voltage, a first clock signal and serial data signals. The discharging circuit discharges the charge sharing circuit according to a reset signal. After the voltage boosting circuit receive the (N-1)th digital signal, the charge boosting circuit whether to boost a first terminal and a second terminal of the second capacitor or not based on an Nth digital signal. After the voltage boosting circuit receives the Nth serial digital signal, the charge sharing circuit outputs an analog signal from the second terminal of the second capacitor.
