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Data processing system with prefetching means
   
Document Number
US Patent 7526613
Issued Date
April 28, 2009
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Abstract
The dismissing of cached data that is not expected to be further used is predicted instead of predicting future I/O operations and then data is fetched from the main memory to replace the dismissed data in the cache. Thus, firstly a location in a cache memory containing data, which is expected not to be further used, is identified, followed by performing a prefetch operation in order to request new data to refill the above location in the cache memory. Therefore, a data processing system comprises at least one processor (12) for processing streaming data, at least one cache memory (200) having a plurality of cache blocks (210), wherein one of said cache memories (200) is associated to each of said processors (12), and at least one cache controller (300) for prefetching data into said cache memory (200), wherein one of said cache controllers (300) is associated to each of said cache memories (200). Said cache controller (300) comprises determining means (350) for identifying at least one location in said cache memory (200) containing first data, which is predicted to be dismissible without penalty and prefetch means (320) for issuing a prefetch operation replacing said first data at said location with second data, which fit said location.
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Number of Claims:
10
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Owner
NXP B.V. (Eindhoven,NL)
Published
April 28, 2009
Application Number
10/547,594
Filed
February 25, 2004
US Classification
711/133   711/137 711/E12.022 711/E12.037 711/E12.069
Int'l Classification
G06F   12/12   (20060101)  
Examiner
Assistant Examiner
Attorney/Law Firm
Priority Data
Mar 06, 2003 [EP] 03100554
USPTO Field of Search
711/137   711/133   711/E12.037   711/E12.069  
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