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Sharing memory within an application using scalable hardware resources
   
Document Number
US Patent 7529906
Issued Date
May 5, 2009
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Inventors
Sheets; Kitrick (Morrisville, NC)
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Abstract
Systems and methods include translating a virtual memory address into a physical memory address in a multi-node system that is initiated by providing the virtual memory address at a source node. A determination is made that a translation for the virtual memory address does not exist. A physical node to query is determined based on the virtual memory address. An emulated remote translation table (ERTT) segment is queried on the determined physical node to see if the ERTT segment may provide a translation. If the translation is received then the translation may be loaded into a TLB on the source node. Otherwise a memory reference error may be generated for the entity or application referencing the invalid virtual memory address.
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Number of Claims:
13
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Owner
Cray Incorporated (Seattle, WA)
Published
May 5, 2009
Application Number
10/643,588
Filed
August 18, 2003
US Classification
711/206   711/147
Int'l Classification
G06F   12/00   (20060101)  
Examiner
USPTO Field of Search
711/206   711/207   711/147  
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