A system for the encryption and decryption of data employing dual ported RAM for key storage to accelerate data processing operations. The on-chip key storage includes a dual-ported memory device which allows keys to be loaded into memory simultaneous with keys being read out of memory. Thus, an encryption or decryption algorithm can proceed while keys are being loaded into memory.
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is a Divisional Application of U.S. application Ser. No. 09/675,069, filed on Sep. 28, 2000, now U.S. Pat. No. 7,006,634.
