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Simulating and verifying signal glitching
 
   
Document Number
US Patent 7533011
Issued Date
May 12, 2009
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Abstract
A simulation system includes glitch injection circuitry in one or more hardware design units to allow the injection of glitches or noise to evaluate the system's response to errors on signals between the hardware design units. The simulation system includes a stimulation module with a set of drivers to input simulation patterns into the design units. Some inputs to software models are driven by the outputs of software models of another design unit. The stimulation module can monitor these signals driven by the software model but it is difficult for the stimulation module to directly drive these signals. The added glitch circuitry allows injection of errors into the simulated hardware by the stimulation module on signals that are not directly driven by the stimulation module but are driven by the outputs of hardware design units.
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Number of Claims:
10
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Published
May 12, 2009
Application Number
12/124,520
Filed
May 21, 2008
US Classification
703/15   714/41
Int'l Classification
G06F   17/50   (20060101)   G06F   11/00   (20060101)  
Assistant Examiner
Attorney/Law Firm
Parent Case
CROSS-REFERENCE TO PARENT APPLICATION This patent application is a continuation of U.S. Ser. No. 11/154,905 filed on Jun. 16, 2005, which is incorporated herein by reference.
USPTO Field of Search
703/14   703/15  
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