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Distributed memory initialization and test methods and apparatus
   
Document Number
US Patent 7539909
Issued Date
May 26, 2009
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Abstract
A memory system includes multiple memory modules, which communicate with a memory controller over one or more channels. When a memory module receives an initialization command from a processor or the memory controller, the memory module performs an initialization procedure of the memory locations associated with the memory module. In an embodiment, at least a portion of the initialization procedure is performed in parallel with the other memory modules performing initialization procedures. Each memory module may include a buffer module, which receives the initialization command, and generates and sends data packets with the initialization data to the memory locations. A memory module also can receive a test command from the processor or memory controller, which causes the memory module to read data from the memory locations, compare that data with expected data, and keep track of any errors that may occur.
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Number of Claims:
25
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Owner
Intel Corporation (Santa Clara, CA)
Published
May 26, 2009
Application Number
10/676,137
Filed
September 30, 2003
US Classification
714/718  
Int'l Classification
G11C   29/00   (20060101)  
USPTO Field of Search
714/718   714/719  
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