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Stress relaxation, selective nitride phase removal
   
Document Number
US Patent 7541277
Issued Date
June 2, 2009
Link
Inventors
Barth; Karl W. (Poughkeepsie, NY)
Kumar; Kaushik A. (Poughkeepsie, NY)
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Abstract
A method for forming a dielectric cap layer over an interconnect layer formed by a back-end-of-the-line (BEOL) interconnect process, the interconnect process including: lithography, reactive ion etching (RIE), metal filling of BEOL conductors, and chemical-mechanical polishing (CMP), wherein a sacrificial material resides between conductors of the interconnect layer, and wherein the dielectric cap layer is made porous through an oxidation process.
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Number of Claims:
1
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Published
June 2, 2009
Application Number
12/112,457
Filed
April 30, 2008
US Classification
438/619   438/618 438/620 438/621 438/622 438/623
Int'l Classification
H01L   21/4763   (20060101)  
Assistant Examiner
Attorney/Law Firm
USPTO Field of Search
438/618   438/619   438/620   438/621   438/622   438/623  
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