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Method for fabricating a recess gate in a semiconductor device
   
Document Number
US Patent 7557030
Issued Date
July 7, 2009
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Inventors
Nam; Ki-Won (Ichon-shi,KR)
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Abstract
A method for fabricating a recess gate in a semiconductor device is provided. The method includes selectively etching an active region of a substrate to form a recess pattern, performing a post treatment on the recess pattern using a plasma, and forming a gate pattern in the recess pattern.
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Number of Claims:
14
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Owner
Hynix Semiconductor Inc. (Kyoungki-do,KR)
Published
July 7, 2009
Application Number
11/594,072
Filed
November 8, 2006
US Classification
438/618   257/E21.507 257/E21.576 257/E21.584 257/E21.589 257/E21.592 257/E23.162 257/E23.167 438/624 438/626 438/637 438/678 438/769
Int'l Classification
H01L   21/20   (20060101)  
Priority Data
Aug 21, 2006 [KR] 10-2006-0078945
USPTO Field of Search
438/622   438/623   438/637   438/677   438/704   438/706   438/710   438/714   438/722   438/723   438/756   438/618   438/624   438/626   438/678   438/687   438/754   438/769   438/725   438/791   438/792   257/E21.226   257/252   257/311   257/577   257/578   257/579   257/582   257/E21.507   257/576   257/577   257/578   257/579   257/589   257/592   257/E23.162   257/167  
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