A cyclic redundancy check (CRC) system for a storage controller comprises a memory that stores first sector data and a corresponding CRC non-zero seed value. A buffer control module includes a CRC module, calculates a CRC value of the first sector data with the CRC module, and combines the CRC value with the CRC non-zero seed value.
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is a continuation of U.S. patent application Ser. No. 10/429,495 filed on May 5, 2003, which claims the benefit of U.S. Provisional Application No. 60/378,471, filed on May 7, 2002. The disclosures of the above applications are incorporated herein by reference in its entirety.
