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Low resistance and inductance backside through vias and methods of fabricating same
   
Document Number
US Patent 7563714
Issued Date
July 21, 2009
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Abstract
A backside contact structure and method of fabricating the structure. The method includes: forming a dielectric isolation in a substrate, the substrate having a frontside and an opposing backside; forming a first dielectric layer on the frontside of the substrate; forming a trench in the first dielectric layer, the trench aligned over and within a perimeter Of the dielectric isolation and extending to the dielectric isolation; extending the trench formed in the first dielectric layer through the dielectric isolation and into the substrate to a depth less than a thickness of the substrate; filling the trench and co-planarizing a top surface of the trench with a top surface of the first dielectric layer to form an electrically conductive through via; and thinning the substrate from a backside of the substrate to expose the through via.
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Number of Claims:
10
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Published
July 21, 2009
Application Number
11/275,542
Filed
January 13, 2006
US Classification
438/675   257/E21.597 438/620
Int'l Classification
H01L   21/44   (20060101)  
USPTO Field of Search
438/235   438/675   438/620  
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