An integrated circuit device having a plurality of embedded processor/controllers and a parallel emulation trace port coupled thereto to provide trace data for debugging the integrated circuit device. A serializer macro is provided within the integrated circuit device to serialize the parallel data from the emulation trace port in order to provide trace data from the IC device in a serial data stream instead of a parallel data stream. A high speed differential serial driver is used to provide the bandwidth required to support the data speeds associated with embedded processors running at high clock rates. An external serial to parallel converter is also provided to convert the high speed serial trace data back to parallel trace data such that the trace data can be input into an emulator in the normal manner. In one embodiment, two serializers are provided within the integrated circuit device to meet data throughput requirements, such as when the IC device has more than one embedded processor/controller. Multi-level signaling of the serial data stream is also provided to further enhance throughput/bandwidth capabilities.
CROSS REFERENCE TO RELATED APPLICATIONS
This application claims the benefit of U.S. Provisional Application No. 60/463,532, filed Apr. 17, 2003, entitled "Method and Apparatus for obtaining trace data of a high speed embedded processor".
