An output stage interface circuit for interfacing with a data bus, comprising first and second rails for receiving respectively a high voltage and a low voltage from a power supply; a data output terminal; a first main switch element coupled between said terminal and the first rail and comprising a first main MOS device having a gate and an independently configurable back gate, and responsive to a first data control signal applied to the gate pulling the voltage on the data output terminal toward the first rail voltage; and a first control circuit responsive to the voltage on said terminal being pulled from a first state across a first voltage reference to a second state for coupling said back gate to said terminal and permitting coupling of the gate of said MOS device to said terminal, the first main MOS device presenting a high impedance on the terminal when its voltage is pulled to the second state.
RELATED APPLICATIONS
This application claims priority under 35 USC 119(e) to provisional application No. 60/834,072, titled OUTPUT STAGE INTERFACE CIRCUIT FOR OUTPUTTING DIGITAL DATA ONTO A DATA BUS, filed Jul. 28, 2006; and under 35 USC 120, as a continuation-in-part of application Ser. No. 11/262,224, titled OUTPUT STAGE INTERFACE CIRCUIT FOR OUTPUTTING DIGITAL DATA ONTO A DATA BUS, filed Oct. 28, 2005, both of which are hereby incorporated by reference.
