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Logic block control system and logic block control method
 
   
Document Number
US Patent 7579864
Issued Date
August 25, 2009
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Abstract
The number of blocks that can be stopped when performing target processing in a programmable logic unit is obtained, and a stop rate of each of a plurality of logic blocks included in the programmable logic unit is calculated. The same number of logic blocks as the blocks that can be stopped are selected from among the plurality of logic blocks in ascending order of a stop rate, the selected logic blocks are determined as logic blocks whose operations are to be stopped, and the operations are stopped. As a technique of stopping an operation of a logic block, a gated clock technique, a power-off technique, or the like is used.
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Number of Claims:
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Published
August 25, 2009
Application Number
12/093,263
Filed
November 15, 2006
US Classification
326/38   326/41
Int'l Classification
H03K   19/173   (20060101)  
Examiner
Priority Data
Nov 25, 2005 [JP] 2005-339945
USPTO Field of Search
326/37   326/38   326/39   326/40   326/41   326/93  
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