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Method for fabricating semiconductor memory device
 
   
Document Number
US Patent 7589012
Issued Date
September 15, 2009
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Inventors
Eun; Yong Seok (Seongnam-Si,KR)
Kim; Su Ho (Icheon-si,KR)
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Abstract
Disclosed herein is a method for fabricating a semiconductor memory device that can prevent oxidation of bit lines when forming an interlayer dielectric for isolating the bit lines. The bit line is formed on a semiconductor substrate where an underlying structure is formed. A silicon on dielectric (SOD) layer is formed on the resulting structure where the bit line is formed. A heat treatment can be performed on the SOD layer with a partial pressure ratio of water vapor (H.sub.2O) to hydrogen (H.sub.2) in a range of about 1.times.10.sup.-11 to about 1.55 at a temperature in a range of about 600.degree. C. to about 1,100.degree. C.
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Number of Claims:
7
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Published
September 15, 2009
Application Number
12/164,848
Filed
June 30, 2008
US Classification
438/618  
Int'l Classification
H01L   21/4763   (20060101)  
Assistant Examiner
Attorney/Law Firm
Priority Data
Mar 05, 2008 [KR] 10-2008-0020689
USPTO Field of Search
438/262   438/618  
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