A number of embodiments are described which include means for receiving signals of unknown frequency to be compared with a reference signal of much higher frequency having a known relationship with a carrier frequency and for providing output signals which vary with the difference in frequency between the unknown and carrier frequencies. The unknown frequency is supplied to an axis crossing detector which produces a pulse output varying in frequency with the unknown signal and which is supplied to a flip-flop or binary dividing circuit. The flip-flop, in turn, operates gating means through which the reference frequency is supplied to counters which store counts of the reference frequency during each cycle. In one embodiment there are two counters, each of which alternately stores counts of one cycle as the other is gated to supply the count to an output device. In a second embodiment, additional means are provided to eliminate a minimum count and over-range counts. A still further embodiment provides most of the functions of the second embodiment, but simplifies the structure by using the initial counts of a new cycle to cause the main counter to discharge its count to the output, reset to zero, and to begin accumulating counts for the next cycle, thus enabling the main counter to store counts for all cycles rather than only alternate cycles. The output count may be utilized directly in a digital indicator or other utilization device or may be converted to an analog voltage proportional to the count by means of a digital-to-analog converter.

There is disclosed an improved clock generator responsive to a first clock signal having a frequency f.sub.1 and a second clock signal having a frequency f.sub.2, wherein f.sub.2 is equal to nf.sub.1. The clock generator provides a fixed duty cycle clock signal having a period equal to n complete cycles of the second clock signal and being at a first level for m complete cycles of the second clock signal and a second level for n-m complete cycles of the second clock signal. The clock generator includes a counter for counting half-cycles of the second clock signal to derive the first and second levels, and a flip-flop for establishing a timing condition responsive to the first clock signal. The clock generator further includes an inhibit circuit coupled to the counter for enabling the counter to begin a new counting period in response to the counter counting n complete cycles of the second clock signal and the establishment of the timing condition. The clock generator inhibit circuit guarantees a consistent duty cycle signal output immune to variations of the period of the first clock signal to as low as n-1/2 complete cycles of the second clock signal.

A receiver for detecting the presence of each of a predetermined group of tones comprising a frequency-to-voltage converter, a plurality of reference-voltage sources and a voltage sensor. The frequency-to-voltage converter converts each tone of a multifrequency input signal to a unique amplitude of its output voltage signal. The voltage sensor compares the voltage signal from the frequency-to-voltage converter to the plurality reference voltages. Logic outputs from the voltage detector indicate the presence in the voltage signal of amplitudes within predetermined ranges of each reference voltage and hence corresponding discrete tones for each input signal. The tone frequencies which can be detected and the detection bandwidth for each are independently adjusted with a pair of potentiometers.

An apparatus for generating a d.c. output signal which is proportional to the frequency of an alternating input signal, includes a pulse generator and a counter arranged to count pulses from the generator for a time which is dependent on the input signal frequency. A digital to analog converter is responsive to the count in the counter and also to the d.c. output signal to provide an intermediate d.c. signal which is compared with a d.c. reference signal. The difference between the intermediate and reference signals is integrated to provide the output signal. The arrangement is such that the d.c. output signal is directly proportional to the input signal frequency.

A digital frequency tracker for a Doppler navigation system in which the input is sampled, autocorrelation function values computed therefrom, and the values used in a Fourier series computation to obtain powers bracketing a center frequency. From these computations tracking and acquisition is provided by shifting the center frequency as a function of the computation until equal power occurs on both sides of the center frequency. Also shown are means to compute altitude by sampling at the FM modulation rate.