A signal limiter operable at video i-f frequency with substantially less AM to PM conversion than prior art signal limiters includes a pair of diodes in inverse parallel combination (with the anode of one diode connected to the anode of the other) between the emitter electrodes of first and second common-collector transistors. Anti-phase i-f signals are applied respectively to the first transistor and second transistor base electrodes. The transistors alternately function as emitter followers to provide a low impedance (of the order of diode forward-impedance) drive to the diode combination to maintain limiter frequency response despite stray capacitances. While one of the transistors functions as an emitter follower, the other has its base-emitter junction reverse-biased, permitting the quiescent current demands of the limiter to be lower than where emitter-follower action is constantly maintained in both transistor circuits. The signal limiter output signal is extracted by differential amplifier means having inverting and non-inverting input terminals connected at respective ends of the diode combination. The differential amplifier may be arranged to be a product detector in an exalted carrier video detector.
A synchronous detector adapted to detect a modulated information signal, such as a video IF signal. The modulated information signal is provided in the form of a vestigial sideband signal. A band-pass filter including a tuned circuit tuned to the frequency of the carrier on which the information signal is modulated has a pass band which is less than the frequency spectrum of the vestigial sideband signal so as to limit the frequency spectrum of the signal passed by the filter to a double sideband signal. A limiter is coupled to the band-pass filter to receive the double sideband signal and for deriving a switching carrier therefrom, the frequency of the switching carrier being equal to the frequency of the carrier on which the information signal is modulated. An emitter-follower circuit is connected between the band-pass filter and the limiter so as to couple the double sideband signal from the filter to the limiter. A multiplier circuit has first input terminals coupled to the limiter for receiving the derived switching carrier and second input terminals for receiving the modulated information signal, whereby the modulated information signal is multiplied with the switching carrier to obtain the information signal.
A multiplier for multiplying the modulated sound and picture carriers to produce an intercarrier sound signal in a quasi-parallel sound channel of an IF section has a pair of anti-parallel connected diodes in a limiter for generating an amplitude limited version of the picture carrier. It has been discovered that the varying capacitance of the diodes with picture amplitude can cause phase shifts and hence phase modulation interference in the intercarrier signal. The latter is especially troublesome for stereo sound reproduction. To reduce such interference, a low value resistor is shunt coupled to the diodes to inhibit the capacitance variations of the diodes and resulting undesired phase modulation in the intercarrier sound signal.
This disclosure depicts a substantially constant capacitance circuit for use with an external circuit having a variable voltage signal across first and second terminals. The circuit produces a constant capacitance across the terminals as the voltage signal varies. The value of capacitance is adjustable. The capacitance circuit comprises a first variable voltage source having its positive terminal operatively connected to the first terminal and a second variable voltage source having its positive terminal operatively connected to the second terminal. First, second, third and fourth reverse biased diodes are provided. The first diode is connected across the first voltage source and the fourth diode is connected across the second voltage source. The second diode is connected from one side of the first voltage source to the opposed side of the second voltage source and the third diode is connected between the first and second voltage sources in an opposite configuration to the second diode. The first, second, third and fourth diodes are connected to be reversed biased by the variable voltage signal and by the first and second voltage sources. The substantially constant capacitance circuit provides a substantially constant equivalent capacitance across the first and second terminals of the external circuit as the level of the variable voltage signal changes.
An envelope detector with an extended linear dynamic range. A first amplitude modulated carrier signal, which can be of an intermediate frequency, is supplied to a first input terminal of a mixer, preferably balanced. The said first signal is also amplified and limited to produce a second signal which is phase synchronized with the carrier signal of said first signal, and which is supplied to the local oscillator input terminal of the mixer. The mixer responds to said first and second signals to produce a substantially dc (baseband) output signal whose waveform is similar to the envelope of said first signal.