An improved input ranging divider and method for an analog to digital converter in which a floating common input line to the A to D comparator is coupled through an R/2R resistive input ladder. A constant reference voltage is applied to the other comparator input. By applying an input voltage to a certain input terminal or terminals of the input ranging divider, while the remaining terminals are either grounded or left floating, a wide range of diverse operating ranges may be made available to an A to D converter while utilizing only a small overall number of inputs.
An A/D converter that settles the converted digital result requiring no timing signal for synchronously-triggered conversion operation is disclosed. The A/D converter converts analog signals into digital signals in a limited number of rippling feedback operations in short time delay periods utilizing a simple circuit configuration that includes a network of parallel comparators. Each of the comparators is fed with a corresponding voltage reference supply by a resistor network. Each of the resistor networks includes series connections of resistors and a corresponding switch means that reflects the status of a determined data bit of the converted data. The circuitry configuration is relatively simply in structure and settles to a converted digital data in short periods of time that requires no synchronizing clock signal.
The control precision of one or more parameters of an integrated circuit (IC), for example the output voltage of a voltage regulator comprised in the IC, may be improved even when using inaccurate components external to the IC. Control of the output voltage, or any parameter, using components external to the IC may include coupling a resistor to the IC and measuring the actual resistance value of the resistor, and based on the measured value, selecting a nominal resistance value from a set of resistance values previously specified by the user. The output voltage, or parameter, may be generated according to the nominal resistance value instead of the actual resistance value, thereby reducing the error that may be incurred due the actual resistance value of the resistor not matching the expected nominal value of the resistor. The difference between each adjacent resistance value in the set of resistance values may be selected to be greater than the greatest measurement error that may be incurred during measuring the actual resistance value.
