A multi-stage amplifier having a plurality of switch mechanisms, one for each stage, that are individually controllable to vary the gain of the amplifier without compromising bandwidth. The amplifier may be embodied in a magnetic storage medium magnetic storage medium that includes a preamplifier in which the multi-stage amplifier is embodied.

Low power, high linearity log-linear control method and apparatus wherein a master log-linear cell generates a control voltage that is buffered and applied to a slave log-linear cell. By breaking this function up into two pieces, the control loop characteristics are isolated from the signal path. Low impedance buffers can be used to drive the slave log-linear cell control ports, independent of the control loop, providing improved gain control range and linearity. This log-linear control is of particular value in applications that require low harmonic distortion and high gain control range in power or pin-constrained applications. Details of the method are disclosed.

A gain control circuit for generating a differential output signal in response to a differential input signal with a gain controlled by an input control signal employs two asymmetric field effect transistors (FETs) as a linear, voltage-controlled resistor. The FETs are interconnected drain-to-source with the control signal being applied to their gates so that their combined channel current is a substantially linear and symmetric function of the input control signal voltage. The gain control circuit includes two bipolar transistors, with the differential input signal being applied across their bases and the differential output signal being developed across their collectors. A resistor links the emitters of the two transistors, sources are applied to the emitters, and a pair of resistors links each collector to a source of bias voltage. The FET-based voltage-controlled resistor may be connected either between the collectors or between the emitters of the two transistors. When connected between the collectors, output signal distortion due to any input signal common mode component is reduced.

A comparator circuit includes a regenerative stage that uses a relatively small quiescent current combined with a relatively large dynamic current to charge a common-source node in the regenerative stage. The quiescent current helps maintain the common-source node in the regenerative stage near a desired charged level. The comparator circuit can also include an input isolation circuit to eliminate charge kick-back to the input signal lines.

A circuit (10) and method for providing a drive current to a voice coil (20) to position a head (13) of a disk drive (14) includes driver circuitry (68, 70) for controlling currents flowing in the voice coil (20) and at least one sense current circuit (92), which may include FET devices (112, 114, 116, 118), for sensing and controlling the currents in a current path (26) of the driver circuit (10). Programmable circuitry (170) is connected to adjust at least one of the sense current circuits (112, 114 or 116, 118) to control a current flowing through the voice coil (20) to position the head (13) to a desired location. A trim capability is implemented by providing one or more trim FETs (145-148, 155-158) that are selectively connectable in parallel with current mirroring FETs (120, 126), which may be, for example, FETs connected to mirror a current in one of the current flow paths (26) of the drive circuit (10). By such selective connection, an effective channel width provided by the FET devices (120, 145-148 or 126, 155-158) can be selectively provided, thereby enabling the current in the voice coil (20), and therefore the position of the head (13) controlled by the voice coil (20) to be adjustable.