An apparatus and method for A/D conversion is provided. The apparatus provides for multi-channel A/D conversion. It may be used in any application in which A/D conversion of either a single signal or multiple signal sources is required. Such applications include X-DSL communications. The apparatus and method allows A/D converters to be fabricated with reduced cost and power when compared with prior art designs. The A/D converter comprises a sampler, a converter and a logic. The sampler includes an input coupled with at least one analog information signal. The sampler repetitively provides at least one pre-sample together with a sample of the analog information signal. The sampling interval between the samples is substantially greater than a pre-sample interval between the pre-sample and the corresponding sample. The converter includes a bit line output and at least one input coupled with the output of said sampler. The converter is responsive to the pre-sample at the input to output a first bit signal corresponding to at least one significant bit of the pre-sample at the bit line output. The converter is further responsive to the sample at the input, to output a second bit signal corresponding to at least one significant bit of the sample at the bit line output. The logic is coupled with the bit line output of said converter. The logic combines the first bit signal and the second bit signal into a composite digital sample of the pre-sample together with the sample.

A pseudo two-step current-mode analog-to-digital converter is disclosed, which carries out fine comparison in current mode such that the analog-to-digital conversion can be executed correctly even when the input signal is very small, and thus conserves chip area for implementing the series-connecting resistors. The analog-to-digital converter according to the present invention comprises: a reference voltage generator disposed between a first voltage (V1) and a second voltage (V2) to provide a plurality of reference voltage nodes; a first comparing device for comparing the analog input voltage with the reference voltages to output a set of rough codes; a first logic device selectively outputting corresponding bit codes as the output of the significant (higher) bits in accordance with the rough codes; a current conversion device for converting the analog input voltage and the voltage level corresponding to the significant bit codes to an analog input current and a significant-bit reference current respectively, and generating a plurality of fine reference currents; a second comparing device for comparing a differential current with the fine reference currents to output a set of fine codes, wherein the differential current is the difference between the analog input current and significant-bit reference current; a second logic device selectively outputting corresponding bit codes as the output of the least (lower) bits in accordance with the rough codes; and a output encoder receiving the significant bit codes and the least bit codes and outputting a set of digital codes after error correcting the significant bit codes.

An analog-to-digital converter (500) for sampling high speed video signals includes a first input (502) for receiving an electronic signal, a sampling clock input (547) for receiving a sampling clock signal, and first and second sampling circuits. The first sampling circuit is arranged in a differential circuit arrangement, and is electrically connected to the first input (502) and to the sampling clock input (547) and is responsive to the sampling clock signal, for sampling the electronic signal to provide a pair of boundary reference voltage signals (706, 708, 710, 712) that bound the voltage of the sampled electronic signal, and further to convert the sampled electronic signal to provide the most significant bits (554) of a digital representation of the electronic signal at times indicated by the sampling clock signal. The second sampling circuit is arranged in a differential circuit arrangement, and includes an interpolation circuit (560) electrically connected to the first sampling circuit, for sampling an interpolated signal corresponding to the pair of boundary reference voltage signals (706, 708, 710, 712), and further to convert the sampled interpolated signal to provide the least significant bits (588) of the digital representation of the sampled electronic signal at times indicated by the sampling clock signal. A video display monitor system (800) includes analog-to-digital converters (812).

A current mode A/D converter for reducing current consumption while enhancing resolution. The A/D converter includes a V/I conversion circuit for sampling and converting an input voltage to a current, an I/V conversion circuit for converting the current supplied from the V/I conversion circuit to a comparison voltage, a comparator for comparing the current based on the comparison voltage and a reference current, and an encoder for generating a digital output signal based on the output signal of the comparator.

An analog-to-digital conversion arrangement for converting an analog input signal into a digital output signal with a most significant part and a least significant part comprises sample means for sampling the analog input signal, a plurality of coarse resolution analog-to-digital converters for converting the sampled analog input signal into a coarse digital signal representing the most significant part of the digital output signal, whereby the coarse resolution analog-to-digital converters are operated in an interleaved way. The analog-to-digital conversion arrangement further comprises a fine resolution analog-to-digital converter for converting the sampled analog input signal into a fine digital signal representing the least significant part of the digital output signal, based upon the coarse digital signal generated by any of said coarse resolution analog-to-digital converters.