A clock line over-protection circuit (28) carried on an interface card (16) for interfacing synchronous clock line (20), power line (22), DC common line (24) and data line (26) between a host computer (12) and a plurality of data link modules (14) with a plurality of associated controlled devices (18) including a series resistor (52) interconnected between a clock disable switch (52) and a clock signal generating amplifier (48) and a current sensor circuit (64, FIG. 3) connected across the series resistor (50) to produce a current sensor signal on an output (62). The current sensor signal is integrated by an over-current protection circuit (58, FIG. 4) to produce an over-current detection signal that varies with the difference in the clock line current magnitude during clock signal phases of opposite polarity. A clock switch control circuit (54) actuates the clock disable switch (52) to turn off and to protectively disconnect the clock line (20) and the data link modules (14) coupled therewith from the clock signal generating amplifier (48). A latch (170, FIG. 6) maintains the clock disable switch (52) in the protective off state until reset and a circuit (110, 126) provides hysteresis to the clock switch control circuit (54) to prevent resetting while the over-current condition persist.
A method for driving appliances and a household appliance for operating two household appliances includes connecting a first household appliance to an electrical wall outlet and disposing an appliance plug receptacle inside the first household appliance, for example, an ironing dummy. The second household appliance, for example, a pressing iron is plugged into the plug receptacle. To prevent an overloading of the electrical mains, a regulating unit disposed inside the first household appliance regulates the current consumption of at least one of these household appliances.
An integrated circuit device has boundary scan structure coupled between a test input and the test output. The test register structure is used to shift information from the test input to a test output. The test shift register structure contains a data shift part coupled to connections for a functional circuit under test. In parallel with the data shift part is an instruction shift structure. By means of test control signals it is controlled whether instruction information travels from the test input to the test output through the instruction shift part or through the data shift part. The instruction shift part controls operation of the device in a test mode. A sensor is provided for sensing a physical operating parameter of the device. The sensor has an output coupled to the shift register structure for feeding a sensing result to the test output from the instruction shift part.
A integrated circuit (IC) implementation of a protection circuit detects and resolves a fault on a bus, such as a stuck-low condition on an I2C bus. The circuit includes logic that detects a fault condition caused by the slave device, e.g. when one or both lines are low for a period longer than a timeout value in the I2C example. Upon detecting the fault condition, the logic disconnects the slave device from the data line and the clock line, for example by activation of switches incorporated in the IC. This typically frees the bus for use by other devices. The logic may also send the slave device one or more clock signals to clear the fault and/or a stop bit when the fault clears to reset the data register in the slave device.
The present invention is a method and apparatus for protecting a power supply from ground faults. The present invention operates substantially independently of the current drawn by the load. In addition, the present invention includes a time delay circuitry for preventing false detection of ground faults when the power source is connecting to the load. In a preferred embodiment, the apparatus of the present invention includes a control relay for connecting the power supply to the load. The apparatus also preferably includes a sensor diode for detecting ground faults and triggering the control relay to disconnect the power source from the ground fault as well as the load when a ground fault is detected. The apparatus also preferably includes a time delay relay to prevent false detection of ground faults by shielding the sensor diode from any current spikes that may occur when the power source is connecting to the load. Finally, the apparatus also preferably includes a fault protection condition indicator to indicate whether the circuit breaker circuitry is working properly.
The present invention is a method and apparatus for protecting a power supply from electrical faults. The present invention operates substantially independently of the current drawn by the load. In addition, the present invention includes a time delay circuitry for preventing false detection of ground faults when the power source is connecting to the load. In a preferred embodiment, the apparatus of the present invention includes a control circuitry for connecting the power supply to the load. The apparatus also preferably includes a sensor circuitry for detecting electrical faults, including ground, transient, and arc faults, and triggering the control circuitry to disconnect the power source from the electrical faults when electrical faults are detected. Thus, the present invention can protect wiring and load connections from improper operation and fire hazards that may be caused by electrical faults. Finally, the apparatus preferably includes a fault protection condition indicator to indicate whether the circuit breaker circuitry is working properly.
