An apparatus for correcting a chromaticity diagram by a variable brightness includes: a first grid voltage controller for controlling a first grid voltage to be a voltage of a predetermined level; a first grid voltage detector for detecting the first grid voltage output by the first grid voltage controller; a phase inverter for inverting a phase of a voltage signal detected by the first grid voltage detector; an analog-to-digital converter for converting the inputted voltage signal, which has been phase-inverted by the phase inverter, into a digital signal; a microprocessor for receiving the digital data of the first grid voltage output from the analog-to-digital converter to produce and output error data; a digital-to-analog converter for converting the error data supplied from the microprocessor into an analog signal, and a cut-off controller for receiving the analog signal output from the digital-to-analog converter and correcting a color-difference signal. The RGB characteristic changes and focus changes according to the first grid voltage changes are automatically corrected and color blur and visibility factor lowering can be prevented.
CLAIM OF PRIORITY
This application makes claims all benefits accruing under 35 U.S.C. .sctn.119 from an application for APPARATUS FOR CORRECTING CHROMATICITY DIAGRAM BY VARIABLE BRIGHTNESS AND METHOD THEREFOR earlier filed in the Korean Industrial Property Office on Dec. 20, 1995 and there duly assigned Ser. No. 52585/1995 and APPARATUS FOR CORRECTING CHROMATICITY DIAGRAM BY VARIABLE BRIGHTNESS AND METHOD THEREFOR earlier filed in the Korean Industrial Property Office on Nov. 22, 1996 and there duly assigned Ser. No. 56729/1996.
Priority Data
Dec 20, 1995 [KR] 95-52585 Nov 22, 1996 [KR] 96-56729
A system and method for controlling the horizontal size of a monitor screen are provided. The provided system for controlling the horizontal size of a monitor screen includes a processor, a driving circuit, and a microcomputer. Here, the processor generates a calibration signal to control the horizontal size of a monitor screen, in response to predetermined control signals. The driving circuit receives the calibration signal and controls the driving capacity of the calibration signal according to an external load to output the calibration signal. The microcomputer generates the control signals. It is preferable that the processor includes a first converter circuit for generating an alternating current (AC) control signal to control an AC element of the calibration signal in response to predetermined control signals, a second converter circuit for generating a first direct current (DC) control signal in response to the control signals, thereby controlling the DC element of the calibration signal, a third converter circuit for generating a second DC control signal to control a DC element of the calibration signal in response to the control signals, and a calibration signal generation circuit for generating the calibration signal in response to the AC, first DC and second DC control signals. Accordingly, the provided processor and system for controlling the horizontal size of the monitor screen control the horizontal size of the monitor screen without being affected by microcomputer generated noise.
The format of a color video signal that has been inputted into a CPU from a video amplifying circuit is identified, and based on a given parameter variable according to this identified format, a second grid electrode voltage and the cathode bias voltages of cathodes for the three primary colors are determined, thereby driving a cathode ray tube with an optimal driving condition adequate for the video signal format. This parameter variable may be adjusted through a manual operation, allowing a user to set any desired driving condition for the cathode ray tube.
A compensating circuit is for compensating distortion of a picture which is displayed on a display unit having a yoke. The compensating circuit controls a yoke current to compensate a picture distortion. The compensating circuit comprises a first generating section for generating a digital deflecting compensation signal in accordance with deflecting compensation data representative of compensation value of the picture. A second generating section generating a variable voltage (+B voltage) in accordance with a PWM pulse signal to control the yoke current on the basis of the variable voltage. A peak holding circuit holds a peak voltage of a flyback pulse based on the variable voltage to produce a peak voltage signal representative of the peak voltage. An A/D converter circuit converts the peak voltage signal into a digital peak signal. A PWM section produces the above-mentioned PWN pulse signal in accordance with the digital deflecting compensation signal and the digital peak signal.
A noise filter includes: a rectifier for receiving and rectifying a pulse output from a signal generator; and a CMOS logic IC for converting the rectified pulse output of the rectifier into a power source, and for filtering noise component mixed in the pulse output from the signal generator.
An apparatus and method for displaying the status of a current display power management signaling (DPMS) mode in a display device uses an on-screen display (OSD) circuit. The current DPMS mode is determined based on an input status of video sync signals and the connection of a signal cable. The current DPMS mode status data is stored in an internal memory of a microcomputer. The OSD circuit is driven using an OSD drive signal output from the microcomputer, so that a message indicative of the stored status data can be momentarily displayed on the display device. In a DPMS mode, any front panel key acts as a program interrupt for DPMS mode operation, which, upon activation, initiates a sequence whereby the DPMS mode is set to normal, horizontal and vertical sync signals are generated, the stored DPMS mode status data is read, and an OSD drive signal is generated. After a time sufficient for user recognition of the current DPMS mode, the OSD drive signal is discontinued and the DPMS mode is reset.
