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Output signal level control circuit in a semiconductor device



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Patent 6323707
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Document Number
US Patent 6323707
Issued Date
November 27, 2001
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Abstract
A pulse signal output circuit charges and discharges a capacitor in response to a clock signal and outputs a pulse signal having a pulse width determined by a time for charging and discharging the capacitor. A control signal generation circuit outputs a control signal in response to the pulse signal, where the control signal has a first voltage level determined by the pulse width. An output circuit has a first output transistor and a first regulating transistor connected in series between the first power supply node and the output terminal. The first output transistor is operated in response to a signal transferred from inside or outside a semiconductor device, and the first regulating transistor is operated in response to the control signal.
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Output signal level control circuit in a semiconductor device - US Patent 6323707 Drawing
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Number of Claims:
16
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Published
November 27, 2001
Application Number
09/493,156
Filed
January 28, 2000
US Classification
327/178   326/34 327/331 327/362 327/378 363/21.01 363/25
Int'l Classification
H03K   19/003   (20060101)  
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Assistant Examiner
Attorney/Law Firm
Priority Data
Feb 04, 1999 [JP] 11-027913
USPTO Field of Search
327/172   327/173   327/174   327/176   327/172   327/173   327/174   327/108   327/109   327/111   327/112   327/362   327/37D   327/306   327/309   327/312   327/315   327/322   327/331   363/25   363/26   363/21.01   326/32   326/33   326/34   326/82  
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