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Chip and package structure



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Patent 7518211
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Document Number
US Patent 7518211
Issued Date
April 14, 2009
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Inventors
Jao; Jui-Meng (Miaoli County,TW)
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Abstract
The invention is directed to a chip comprising a substrate having a plurality of pads located thereon and a passivation layer located over the substrate, wherein the passivation layer has a plurality of openings and recesses formed therein and the openings expose the pads respectively. During the later performed packaging process, a molding compound can fill out the recesses on the passivation layer to provide a stronger mechanical adhesion between the molding compound and the passivation layer. Therefore, the peeling issue of the molding compound can be solved.
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Number of Claims:
17
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Published
April 14, 2009
Application Number
11/164,135
Filed
November 11, 2005
US Classification
257/529   257/773 257/786 257/E23.149
Int'l Classification
H01L   27/082   (20060101)   H01L   29/40   (20060101)  
Examiner
Attorney/Law Firm
USPTO Field of Search
257/529   257/778   257/773   257/786   257/758   257/E23.149  
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