A current mirror amplifier is provided wherein the feedback path around a diode-connected device is modified by adding a resistor in series with the input terminal of the diode-connected device in order to cancel a pole which appears at the unity-gain frequency. This will improve the frequency response and provide for increased bandwidth. The added resistor may be realized in MOS technology by employing a tracking MOS device.

A monolithically integratable signal amplifier stage with high output dynamics includes first, second, and third bipolar NPN transistors and first and second current mirror circuits. The collector terminal of the first transistor is connected to the positive terminal of a supply voltage generator. The base terminal of the first transistor is in input terminal of the amplifier stage. The base terminals of the second and third transistors are connected to the emitter terminal of the first transist...

These circuits include a current mirror amplifier (CMA) having an input (master) transistor and at least one output (slave) transistor. The signal translation input circuit comprises a third transistor having a base-emitter junction connected between the input and common terminals of the CMA and a signal voltage input terminal at the collector of the third transistor. The output current of the mirror is a function of the signal voltage applied to this signal voltage input terminal.

A current mirror circuit comprises a first current-to-voltage converter for inputting an input current, a second current-to-voltage converter, a first transistor, the collector or drain of which outputs an output current, and the emitter or source of which is connected to the second current-to-voltage converter, and a control unit for controlling a control electrode of the first transistor. The control unit refers a voltage current-to-voltage converted by the first and second current-to-voltage ...

A current mirror circuit includes a first current-mirror transistor coupled to a second current-mirror transistor. A load is coupled to the second current-mirror transistor. A first current source is coupled to the first current-mirror transistor to cause a bias current to flow through the first current-mirror transistor and a second current source is coupled to the second current-mirror transistor and in parallel with the load to shunt the bias current away from the load.

A current mirror with a transconductance amplifier containing the current mirror with a low static current. The current mirror includes: a load with first end and a second end, the first end coupling to a first input current and a fixed voltage difference existing between the first and second ends; a first transistor, whose drain is coupled to the second end of the load, whose gate is coupled to the first end of the load, and whose source is coupled to a second input current; and a second transi...

A variable gain voltage/current converter circuit of the present invention has an input section active element having an input terminal, an output terminal, and a ground terminal for performing a voltage/current conversion, a potential control circuit for controlling a conversion gain of the input section active element based on a potential at the output terminal of the input section active element, an output section voltage/current converter circuit for generating a current corresponding to a v...

A chain-chopping current mirror and a method for stabilizing output currents are disclosed. The current mirror includes multiple output nodes, a bias source unit, multiple current mirroring units and multiple switch components. The bias source unit provides a reference bias according to the received current. Each of the current mirroring units outputs an output current according to the reference bias. The control terminal of each the switch component receives a clock signal and determines whethe...

A circuit arrangement for reproducing in an output circuit (4) a current (i1) flowing in an input circuit (1) comprises a PNP-current mirror (2) to the input (2-1) of which the input circuit (1) is connected. The mirror output (2--2) is connected to the emitter of an output transistor (3) of the PNP-type the collector of which is connected to the output circuit (4). The base of the transistor (3) is connected to the input (5-1) of an NPN-current mirror (5), whose output (5-2) is connected to the...

A current mirror circuit includes a current input node for receiving an input current, an upper, cascoded current mirror, a lower current mirror, and a biasing means. In a FET implementation, the upper mirror includes first and second cascoded FETs which are connected together at the current input node, and third and fourth cascoded FETs connected to mirror the current conducted by the first and second FETs. The lower current mirror receives the mirrored current and mirrors it back to the upper ...