A method for eliminating subharmonic false locking in a sampler and frequency multiplier phase-locked-loop source locking system comprising the modification of a prior known algorithm for determining the frequency of the first local oscillator used for controlling the sampling of the output of a source voltage controlled oscillator. The frequency of the first local oscillator is determined using prior algorithms for determining the lowest usable harmonic number H and the highest usable first osc...

A method of controlling a frequency synthesizer and a frequency synthesizer having a controllable output signal frequency and including a direct digital synthesizer whose output signal is coupled to the input of a phase-locked loop. To reduce the settling time of the synthesizer, the direct digital synthesizer includes a control circuit for controlling the frequency of the direct digital synthesizer from a first frequency to a second frequency in accordance with predetermined frequency steps.

An analog switch is provided in a phase-locked loop (PLL) synthesizer using direct digital synthesizer (DDS) circuitry, for opening a PLL. The PLL is closed to make operative the DDS circuitry and a fixed frequency divider within an idle time slot of each time-division multiplexing (TDM) frame. For the rest of the frame, the voltage-controlled oscillator within the PLL is held in a "hold state".

The circuit arrangement of the invention presents an oscillator, whose frequency can be linearly varied within a wide control range, without affecting the oscillator's stability. The frequency of a fixed frequency generator (1) is divided to the desired frequency by a frequency divider (2), whose divider ratio can be varied in very small steps, and the resulting jitter is filtered out by a very simple phase control circuit (3). Improved short-term stability and holdover performance are also achi...

A PLL circuit for generating a clock signal synchronized with a first reference signal generated by superimposing a wobble signal on a land pre-pit signal or a second reference signal generated from a wobble signal. The PLL circuit enables reduction in circuit scale. When a DVD-R/RW is used as an optical disc, a first loop synchronizes the frequency of a wobble signal with the frequency of a divisional clock signal, which is generated from a recording clock signal of a voltage-controlled oscilla...

A numerically controlled oscillator including an RTS value producing circuit which produces a series of residual time stamp (RTS) values indicative of a relation between the setting value and an actual oscillation frequency. A pulse train generator generates a pulse train in a period corresponding to the produced series of RTS values and a phase synchronous oscillator oscillates at a frequency in synchronism with the pulse train output from the pulse train generator. Preferably, the pulse train ...

A frequency synthesizer which uses a direct digital synthesizer (DDS) to drive a phase lock loop. The DDS generates a highly accurate periodic signal of a frequency selected from a plurality of reference frequencies. A phase lock loop receives the DDS generated reference signal and a divide-by-N signal for generating an output signal at a frequency determined by the divide-by-N signal. The frequency resolution of the phase lock loop is N times the reference signal. In a second embodiment, the DD...

A programmable crystal oscillator is provided having a memory for storing frequency-defining parameters. Typically, one of these parameters is used to program an adjustable capacitive load circuit coupled to a crystal to thereby adjust the crystal source frequency. Additional parameters are used to program the output frequency of a phase locked loop circuit coupled to receive the adjusted source frequency. A further parameter can also be used to divide the output frequency of the phase locked lo...

A frequency-adjustable oscillator suitable for digital signal clock synchronization comprises a crystal oscillator circuit for generating a driving signal and having a voltage-variable control input for adjusting a frequency of the driving signal, a phase detector circuit for generating a phase offset signal, a filter which operates on the phase offset signal to produce a VCO control signal, a voltage controlled oscillator circuit operably linked to the filter and responsive to the VCO control s...

Metal detection apparatus comprises an oscillator circuit including an inductive detection coil and a detector for rectifying the output of the oscillator circuit synchronously with the frequency of oscillation. A comparison circuit compares the rectified output of the oscillator circuit with a reference signal and generates an output signal having a value related to the amplitude of the oscillator output. A feedback circuit generates a positive feedback signal and applies it to the oscillator c...