A PLL lock indicator circuit for indicating when a phase-lock-loop circuit is in lock includes a gate circuit coupled to the phase/frequency detector of the phase-lock-loop circuit for providing an output logic signal that is responsive to output logic signals from the phase/frequency detector being in a predetermined state. A counter circuit is enabled by the output logic signal of the gate circuit for providing an output logic signal when the counter circuit has reached a predetermined count. ...

A voltage controlled oscillator (VCO) is tunable over a wide frequency range while exhibiting low phase noise by dynamically switching between two or more voltage/frequency operating curves. Reference voltages establish switching thresholds for each operating curve. A control circuit compares the VCO tuning voltage to the reference threshold voltages, and based on that comparison and its previous outputs, generates switching signals effective to selectively couple and decouple one or more freque...

A phase lock loop includes a charge pump, a voltage controlled oscillator (VCO), and a phase frequency detector. The phase frequency detector has a dynamic logic structure. The phase frequency detector generates up and down signals for directing the charge pump to provide a voltage signal to the VCO to vary the frequency of the VCO clock. The difference between the up and down signals is indicative of the phase difference between the reference clock signal and the VCO clock. The phase frequency ...

A secondary clock generator circuit is described in which a ratio is programmed into circuitry which will be embedded on all components. The programmable circuitry takes the system's master clock signal multiplies it by the programmed ratio and yields a secondary clock signal equal to the ratio times the master clock signal for driving components and interfaces. The invention is particularly useful in computer systems operating at a first clock frequency which have replaceable components that ru...

A phase lock loop monitors a first digital signal and generates a second digital signal operating substantially at frequency and in-phase with the first digital signal. The first and second digital signal are applied to a lock detection circuit for generating a first digital output signal having a first logic state from a mutually exclusive combination of the first and second digital signals. The first logic state of the first digital output signal is compared with a time slot window formed by a...

The present invention provides a synthesizer having an efficient lock detect signal generator, an extended range VCO that can operate within any one of a plurality of adjacent characteristic curves defined by a plurality of adjacent regions, and a divide circuit implemented using only a single counter along with a decoder. This allows for a method of operating the synthesizer, methods of establishing or reestablishing a lock condition using the extended range VCO, and a method of designing a plu...

A loop phase detector circuit in which the phase offset error arising from imperfections in the circuit parameters, inter alia, temperature and power supply voltage, is reduced to a minimum by the circuit arrangement disclosed herein. The phase comparator circuit compares the phase of the output frequency of a voltage to frequency converter with an input reference signal, and provides, in complementary form, a phase comparison error signal and the complement of a phase comparison error signal. D...

A phase lock circuit has a voltage tuned oscillator (VTO) which is tuned by a tuning circuit. The tuning circuit supplies tune-up and tune-down (in frequency) signals to phase lock the VTO with respect to a reference signal. The tuning circuit supplies the tune-up and tune-down signals based on the results of samples of the VTO output from a variable modulus counter (VMC) with respect to a reference signal. The reference signal and VMC are reset to a time reference by a reset generator during co...

An electrical signal generator for generating signals at specific frequencies includes means for producing an adjustable frequency output, adjusting means for causing changes in the output frequency, and control means for adjustably pre-selecting the sizes of the frequency changes. In this way, the operator can be provided with a frequency changing control which, when operated, causes the output frequency to change in predetermined steps.

A lock detect circuit (FIG. 3) for use in a synthesiser of the type comprising a phase comparator (5), a reference frequency source (11, 13, 15) a variable frequency oscillator (1), a variable divider (3) and a loop amplifier (7). The circuit includes logic gates (31, 33, . . . 41) to monitor the frequency `up` and frequency `down` error signals (C.sub.U, C.sub.D) produced by the comparator (5) and provides an `in-lock` indication (S) when frequency `up` or frequency `down` signals exclusively a...