or
Results for US_CLASSIFICATION: 358/1.15
Showing 1 - 10 of 4216
A word processing system having an input/output electric typewriter, a magnetic tape recorder/player and a shift register buffer memory. A subsidiary memory in the form of a pair of series-connected single character registers are provided to form a feedback loop around the main shift register. Clocking and controls are provided for selectively connecting the output of the buffer to its input through the feedback loop, or to an input of the recorder/player, or to an input of the typewriter; and a...
The apparatus comprises an electronic teleprinter constituted by a first set of basic peripheral units such as the printer, keyboard etc. as well as a punch/reader, arranged to converse directly with the line and controlled by a first central unit, and a second set of peripheral units such as a disc unit, one line display and VDU controlled by a second CPU and able to execute more sophisticated operations such as the automatic filing of messages, their display etc. The two CPUs each autonomously...
A peripheral-controller, designated as a Train Printer-Data Link Processor, provides the control interface between a main host computer and a train printer mechanism. A plurality of such peripheral-controllers make up an I/O subsystem whereby a main host computer is relieved of housekeeping duties in regard to peripheral units. This train printer data link processor (peripheral-controller) is made up of two slide-in circuit cards. The first card, known as the common front end (CFE) provides micr...
A specialized RAM buffer memory is provided to work in conjunction with a peripheral-controller designated as a train printer-data link processor. The RAM buffer memory has addressable locations holding two 8-bit bytes at each addressable location. Thus, each addressable location has a top byte and a bottom byte, each of which represents a graphic character. A first dedicated portion of the buffer storage memory is called the print image buffer (PIB). This buffer is loaded with character data ac...
A specialized peripheral-controller, designated as a data link processor, is used in an I/O subsystem to control data transfers from a main host computer into a peripheral train-printer mechanism. The peripheral-controller has a RAM buffer memory with a pluraity of addressable locations. Each addressable memory location stores two characters designated as the top character and the bottom character. The RAM buffer includes three dedicated areas: (i) a first area for storing codes of the character...
A specialized peripheral controller for controlling data transfers between a main host computer and a train printer mechanism is provided with a peripheral control interface circuit to control and monitor the printing of data and the paper format for the train printer mechanism. The peripheral control interface circuit includes a printer column timing pulse generator for enabling the train printer mechanism to scan over each column of its available printing area at least twice during each revolu...
A device controls in real time the assembly of data for a bit map scanning device, such as a laser printer, under supervisory control of a host processor. The image data words are stored in a source memory and assembled in a video buffer, and automatically scanned out to the scanning device. The host processor generates a simplified set of control words that defines graphics, text and layout of the page to be assembled. A raster interface synchronizes the output of the assembled data with the sc...
High printing speeds for graphics data are achieved with a laser printer by transmitting compressed graphics data from a main processor over an I/O (input/output) channel to a vector generator scan converter which reconstructs a full graphics image for input to the laser printer through a raster data input port. The vector generator scan converter includes a microprocessor with associated microcode memory containing a microcode instruction set, a working memory for storing compressed data, vecto...
For the runtime-optimized and code-optimized storage of characters of a given character set in the image dot memory, the various characters are investigated matrix line by matrix line according to various image dot arrangements (ZE) and only those matrix lines (SP) with different image dot arrangements (ZE) are stored. For each of these matrix lines (SP), a reference to the associated image dot information is filed in the character set and the image dot information of a matrix-matrix (sic) line ...
An information transmission-controlling apparatus which comprises a memory for storing a series of words each formed of a plurality of binary coded characters; an information input device for supplying the memory device with a numeral-type word or a letter-type word consisting of a larger maximum character bit number than that of a numeral-type word and a word-positioning code interposed between the respective words; and a word character bit number-designating device for determining the characte...
1 2 3 4 5 6 7 8 9 10
About| FAQs| Terms & Disclaimer| Link to Us| Contact Us