An improved associative memory employs plural separately addressable memories, e.g., random access memories (RAMs), which may be written into, or read from in conventional fashion. In a recognition mode, information is sequentially read from differing memory locations, and compared with an operand supplied on a data bus by a central processing unit (CPU), comparator apparatus being common for an array of storage locations. The comparison results, determined in accordance with a CPU-specified cri...

In the execution mode of a trained processor, query key functions are compared with reference key functions stored in a memory array to select a desired response. During the comparison operation, a criterion is imposed to indicate when reference key functions corresponding to a given group of trained responses can not be an appropriate response for an encountered untrained point, wherein an untrained point is a query key for which no corresponding reference key exists. In response, search of som...

An improved associative memory employs plural separately addressable memories, e.g., random access memories (RAMs), which may be written into, or read from in conventional fashion. In a recognition mode, information is read from differing memory locations, and compared with an operand supplied on a data bus by a central processing unit (CPU), comparator apparatus being common for an array of storage locations. The comparison results, determined in accordance with a CPU-specified criterion, are t...

An improved associative memory employs plural separately addressable memories, e.g., random access memories (RAMs), which may be written into, or read from in conventional fashion. In a recognition mode, information is sequentially read from differing memory locations, and compared with an operand supplied on a data bus by a central processing unit (CPU), comparator apparatus being common for an array of storage locations. The comparison results, determined in accordance with a CPU-specified cri...

A data driven processor for searching data stored in memory to identify messages or other data containing operator selected keywords containing alpha-numeric or other characters and for performing arithmetic and other functions performed by processors. The processor comprises a plurality of commercially available integrated circuit random access memories (RAMs). The binary words read out of the RAMs are applied to the higher order addressing inputs of the same RAMs. Messages being searched for k...

A method and apparatus for high-speed searching of a byte stream for predetermined words or terms. More particularly, the present invention is directed to a method and apparatus for use in combination with a data source supplying a stream of binary signals defining both the identities of alphanumeric characters occurring in an ordered sequence and the position of each such character within a character group for detecting the occurrence of a particularly ordered group of R characters. The apparat...

The subject of this disclosure is a Finite State Automaton (FSA) used as part of a term detector employed in a digital pattern search system (searcher). In particular the invention includes various advances in the art of FSA design which make the FSA practical for pattern recognition. Specifically, these advances minimize the amount of memory which is required in each FSA in performing pattern recognition, and allow a speed capability such that the searching can be performed at the rate at which...

An interactive data retrieval apparatus in which a data base store is searched by content using search keys entered by an operator. Dedicated hardware includes a plurality of search modules and apparatus for clocking the byte-wide data stream read from the data store through successive search modules. In each module, the data is compared with an entered search key. When a match is found between the data stream and the search keys, the data record is displayed to the operator. The apparatus can d...

A text comparator receives data stored in a mass storage device. The text comparator includes word logic, delimiter logic, set logic, set combination logic, proximity logic, and programming logic. The delimiter logic serves to monitor the characters transferred from the mass storage device and provides discrete signals depicting whether the character being transferred is a predefined delimiter character. The word logic serves to store data regarding predefined words (i.e., strings of characters)...

A text comparator which includes a decoded data memory (13) which contains a plurality of shift registers (SR2d-SR7F), one shift register for each of the plurality of different symbols forming the data base stored within the mass storage device (11). The decoded signal is applied to the input lead of the shift register associated with that character, and a clock signal applied to each shift register of the decoded data memory. The decoded data memory will provide signals on the output leads of e...