A microprogrammed control unit comprising an instruction memory for storing microinstructions with no repetitions and an address memory for storing the addresses of microinstructions which make up a microprogram. Within the instruction memory, micro-orders are densely stored. Each time that a word is accessed from the instruction storage, a mask which is stored along with the address in the address storage is utilized to select appropriate micro-orders to produce a desired microinstruction. Thro...

Circuits for the improved operation of microprogrammable computers are described. This improvement is accomplished by providing a set of read-only memory devices for storing the micro-code for all combinations of arithmetic logic unit function, carry bit and file register address than can be specified by an instruction word executed from Main Memory. In a universal microprogram designed to execute that family of Main Memory instructions that differ only in the functions specified above, the inst...

There is described a micro-programmed data processor having, in addition to the main memory, a memory for currently used strings of micro-operators in which any portion of the latter memory can be overlayed from main memory by a unique micro-instruction that is handled as one more micro step in whatever micro-string is being executed. Once the overlay is complete, the next micro-operation in sequence is executed. This micro-operator may be from the previously stored micro-operator string or from...

A microprogrammed digital computer employing a plurality of programmable read only memories containing stored control words which are specially chosen so as to provide for microinstruction sequencing in a manner which in the first instance assumes that no branching possibilities are present, even though one or more branching possibilities may in fact be present in the microinstruction flow path. The correctness of microinstruction sequencing is monitored concurrently with the execution of a micr...

A microcontrol extension mechanism for increasing the number of control actions for a processor data flow section in the same manner as could be accomplished by increasing the length of the microwords in the processor control store but without actually increasing the length of such microwords. The additional control actions are obtained by means of a relatively small read only storage array having stored therein a separate pluralbit mode word for each of the different machine macroinstruction op...

A method and an apparatus for improving the speed of executing instructions and reducing the microprogram memory requirements in a conventional digital computer system. The method or apparatus incorporates the use of a predetermined bit position in the microinstruction word which is set to a binary one when the microword is the last microword of an executing microprogram. The apparatus is responsive to the electronic representation of the binary one signal to cause the microinstruction execution...

A method and an apparatus for improving the speed of executing instructions and reducing the microprogram memory requirements in a conventional digital computer system by eliminating a ROM address register for addressing microwords. The method or apparatus incorporates the use of a predetermined bit position in the microinstruction word which is set to a binary one when the microword is the last microword of an executing microprogram. The apparatus is responsive to the electronic representation ...

A computer system architecture includes a processor for processing data, a memory for storing at least macroinstructions for use by the processor, microinstruction logic for storing and providing sequences of frequently used microinstructions, and busses for transmitting at least macroinstructions between the processor and memory. Microinstruction memory circuitry stores microinstructions in segmented form in available microinstruction memory space. Microinstruction segment by segment selection ...

An arrangement for organizing a computer is provided wherein all instructions in programs required for data processing, including memory addresses, are generated and processed outside of the central processor unit by using programmable logic arrays. Programmable logic arrays are also used for program supervision and for controlling peripheral hardware. Thus, the central processor unit is left to perform solely data processing and need not do any non-data processing functions.

A storage device (hereinafter referred to as a high speed store) includes a plurality of registers or locations and has an access speed compatible with that of its processor. Operands and/or operators are entered into one group of said registers hereinafter referred to as a high speed stack (a push operation) and removed therefrom (a pop operation) for processing in a last-in-first-out order. The number of entries stored in the stack at any moment can become very large due to the nesting of oper...