A floating gate transistor comprising a floating silicon or metal gate in a field effect transistor which is particularly useful in a read-only memory is disclosed. The gate which is surrounded by an insulative material such as SiO.sub.2 is charged by transferring charged particles (i.e., electrons) across the insulation from the substrate during an avalanche (breakdown) condition in the source or drain junctions of the transistor.

In connection with the fabrication of an integrated circuit, a method for simultaneously completing the formation of a contact, an interconnect, a gate and a source or drain is disclosed. An integrated circuit field effect structure wherein a diffused silicon area is connected directly to a polysilicon member by conductive silicon and more specifically the source or drain of one device is directly and continuously connected to the gate of an adjacent device by a conductive silicon member.

A random-access memory array which utilizes a metal-oxide-semiconductor MOS device as a storage element is disclosed. The device includes a floating gate which may be selectively charged and discharged in order to program the device with a "0" or a "1." The memory array which utilizes a plurality of these devices may be produced as an integrated circuit on a single substrate.

An electrically programmable semiconductor read only memory array which utilizes a floating gate metal-oxide-semiconductor (MOS) device as a storage element is described. The floating gate of the device (storage element) may be negatively charged by avalanche injection. A field effect transistor is coupled in series with the storage element to form a single memory cell. A plurality of cells comprise an array. The gate of the field effect transistor is coupled to an X-line of the memory array and...

Electrical resistor of semiconductor material formed in the thickness dimension of a high-resistivity substrate underlying an epitaxial layer of the same conductivity-type. A region of the opposite conductivity-type in the substrate, contiguous with the epitaxial layer, extends laterally across all but a predetermined area of the substrate in conjunction with the resistivity of the substrate material determining the resistance value of the resistor. Semiconductor devices and other circuit elemen...

A metal-oxide-semiconductor (MOS) random-access-memory array which utilizes dynamic memory cells is disclosed. All the cells in the array are simultaneously refreshed upon the application of a single external refresh signal. The array does not require synchronization of the refresh signal and memory access signal.

A gas reactor for depositing thin films such as silicon dioxide, the lid of the reactor includes a plurality of concentric rings and a plurality of ports disposed between adjacent rings, a generally radial flow above the specimens is maintained in the reactor.

A decoder circuit for a metal-oxide-semiconductor (MOS) memory array which employs a single clock or timing signal is disclosed. Inverter buffers are utilized with a plurality of different decoder logic circuits. Discrimination of each input address is accomplished by the structurally different decoder logic circuits as opposed to the prior art technique of selecting different buffered address inputs.

A floating gate solid state storage device comprising a floating silicon or metal gate in a field effect device which is particularly useful in integrated circuit devices such as a read-only memory is disclosed. The gate which is surrounded by an insulative material such as SiO.sub.2 is charged by transferring charged particles (i.e., electrons) at relatively low voltages (e.g., less than approximately 50 volts) across a thick insulation layer (e.g., greater than approximately 500 angstroms) fro...

A memory system is disclosed wherein the system may be controlled by providing a single clock signal to an array of memory cells on a monolithic semiconductor substrate. The substrate includes a timing generator means and compensating means which compensates for fabrication variances.