A digital phase lock loop (PLL) circuit adaptable to a hard disk drive. The PLL operable at a high speed comprises a pulse shaper for subjecting raw data pulses from the disk drive to waveform-shaping, a phase comparator for producing a phase control pulse on the basis of the relative positions of a delayed reference clock (VCLK) pulse and each of said waveform-shaped data pulses from the shaper, and a phase shifter for generating the VCLK pulse in response to the phase control pulse.

A dynamic random access memory having a bit line precharge capability is provided with an internally gated RAS signal, such that bit line precharge operation does not being until an internal timing signal is issued indicating completion of the read/write internal timing chains. The external RAS signal is made to transition prematurely into an inactive (or precharge) state, so that the bit line precharge operation necessarily occurs immediately after the internal timing chains are completed. This...

The present invention incorporates a control mechanism in an input buffer for a gate array so that the input buffer may be directly enabled or disabled by a control signal. Hence, no power will be wasted by the unnecessary operation of gates internal to the input buffer or subsequent stages. The method of control is to couple a common control signal to one input port of each of a plurality of two-input AND gates and couple an incoming data signal to the other input port of each of the two-input ...

A stepper motor control circuit having a reduced number of discrete components is provided by using an on-chip analog to digital converter of a single chip microcomputer to control the waveforms of chopped winding currents. Four power MOSFET's, four diodes and two sense resistors can be added to the circuitry of a board populated by the single chip microcomputer to implement a full step motor controller. The addition of a holding current circuit frees the computer for servicing other tasks when ...

A method for electrically testing integrated circuits in a wafer comprises the steps of forming a layer of material (20) on the surface of the wafer having a dielectric constant which simulates the dielectric constant of the packaging material which will eventually encapsulate the integrated circuits. In one embodiment, photoresist is formed on the integrated circuit prior to wafer test. In this way, during wafer test, the capacitive coupling between the conductive structures (14) in the integra...

A mass air flow measurement circuit is disclosed which provides a digital output without using a separate analog to digital (A/D) converter. This air flow measurement circuit includes a bridge circuit, wherein voltage is supplied to the bridge to control current through one or more sense elements in order to keep the temperature and resistances of the sense elements constant and balance the bridge. An electrical comparator is used to sense the balance of the bridge, and the output of the compara...

An apparatus is provided which determines whether a member is placed correctly on a base. The apparatus comprises an arm mounted for movement toward and away from the base which normally holds the member in place on the base. The arm has a projection which extends a distance beyond the surface of the arm and toward the base. When the member is in a first or third position relative to the base, the projection makes contact with the member. When the member is in a second position relative to the b...

A method in which a variable sized segment of a memory array can be written in a single memory cycle is provided. A predetermined set of the column addresses or a combination of the column address and I/O field specify the starting location of a block of a memory array row to be written. The set of remaining column addresses specifies displacement from the starting location. Together the starting segment and the displacement define an area of memory which can be written in a single cycle.

A mini-relay signal tester designed to simplify, speed up, and test the operation of "mini" or "reed" relays which are suspected of intermittent failure. These types of relays are extensively used in memory and gate-array testing systems and their failure can cause the semiconductor devices being tested to be erroneously rejected. The relay tester dynamically exercises the relay being tested by application of a square-wave input signal to its coil. The square wave input "reference" signal drivin...

An apparatus is described which controls the movement and positioning of a platen on which wafers may be mounted. The apparatus comprises a stepper motor having a motor sprocket member operatively coupled to a platen by a drive mechanism. The drive mechanism comprises a chain which cooperates with the the stepper motor by engaging with the motor sprocket member. The drive mechanism also comprises a platen chain sprocket having a platen shaft member. The platen is movably connected to the platen ...