A system and method for reducing or eliminating degradation in voice transmission quality resulting from repeated or sequential compression and decompression of voice packets over one or more packet networks. When a voice connection is established between two parties on separate packet networks, the signal is often passed through a PBX and/or over PSTN lines, with the occurrence of two tandem low-bit-rate codecs used to transfer the signal and introducing degradation of voice quality. This situa...

The transport of ABCD bits in a digital packet network is facilitated by the inclusion of the ABCD bits into the RTP header of the digital packets. The ABCD bits are first placed in the unused bits of the RTP header. Redundancy of the previous ABCD bits, when applicable, is achieved by restricting the size of fields in the header to reserve space for redundant ABCD bits. The ABCD bits are placed in the reserved portions of restricted header fields.

An integrated preamplifier circuit for detecting a signal current from a photodiode and converting the signal current into an output voltage is provided. The circuit includes a signal amplifier and a dummy amplifier, the dummy amplifier being matched to the signal amplifier. Each of these amplifiers includes an input transistor and an output transistor, the input transistor of the signal amplifier receiving an input signal derived from the signal current and the input transistor of the dummy amp...

A method to reduce the amount of bandwidth used in the transmission of digitized voice packets is described. The method is used to reduce the number of transmitted packets by suspending transmission during periods of silence or when only noise is present. The system determines if a background noise update is warranted based on human auditory perception factors instead of an artificial limiter on excessive silence insertion descriptor packets. The system searches for characteristics in the percep...

The invention relates to a reference voltage source including a bipolar transistor having a base, a collector and an emitter electrode. The reference voltage source further comprises a Schottky diode (D) whose anode is connected to the base electrode of the bipolar transistor and whose cathode is connected to the collector electrode of the bipolar transistor. The currents flowing through the Schottky diode and bipolar transistor are each set so that a temperature-independent reference voltage (V...

A modem-based echo cancellation enhancement for digital communications networks is provided. The effects on echo cancellation of non-linearity in a far end echo path in a digital telephone system are reduced by introduction of non-linearities into the near end signal prior to generation of the echo cancellation signal. Near end signal is sampled after linear to PCM conversion. A PCM to linear conversion is added prior to the echo canceler. The near end delay line can be provided between the conv...

A message-based memory system for Digital Signal Processor (DSP) storage expansion has a shared memory device connected to a number of DSPs through a packet communication bus. Each of the DSPs has a packet bus interface interconnected to the packet bus; and a messaging unit connected to the packet bus interface. The memory device interconnected to the packet bus can provide shared memory space for the DSPs to increase the amount of memory available to each DSP. The memory device can also be util...

A Complementary CMOS differential amplifier has automatic operating point adjustment (self-biasing) and the properties of a rail-to-rail amplifier. The CMOS differential amplifier uses folded cascodes and is considerably faster in operation than previous CMOS differential amplifiers, since it comprises a circuit element that ensures that, during the operation of the CMOS differential amplifier, all MOS FETs of the cascodes operate in their saturation range (that is not in their resistive range)....

An apparatus is provided for configuring data cells received in a telecommunications process in a continuous stream of data cells of fixed length and each comprising a header and a user data part. The apparatus comprises a processing unit, adapted and configured so that it is able to check data cells for the presence of empty cells, discard the data cells consisting of empty cells and then check the user data parts of the data cells less the empty cells--without the need to buffer the same--as t...

A digital bus monitor used to observe data on a bus (14, 16, 18) connecting multiple integrated circuits (10, 12) comprises a memory buffer (30), bypass register (34), test port (38) and output control circuits (42, 46) controlled by an event qualifying module (EQM) (32). In response to a matching condition the EQM (32) may perform a variety of tests on incoming data while the integrated circuits (10, 12) continue to operate at speed. A plurality of digital bus monitors (20, 22) may be cascaded ...