In the method of dynamically setting at least one threshold at an access point in a wireless local area network, signals from other access points are sensed, and a carrier detect threshold is determined based on the received signal strength of at least one of the sensed signals.

The insertion phase or delay of an amplifier can be controlled by comparing signals from the amplifier path with signals from a corresponding reference path without requiring the overall signal delay through the reference path to nominally match the overall signal delay through the amplifier path. Amplifier and reference path signals can be combined to form a combined signal whose power is detected using a narrow-band, frequency-selective power detector. For given phase and delay offsets between...

A circuit is provided where impedance converters (41-48) are provided such that active components (P1 to P8) can be switched off without power from the other active components leaking away through those components which are switched off.

A power amplifier's complex pre-distortion curve is generated by decomposing a representation of an input signal, processing the resulting decomposed signals using analog techniques, and performing signal re-composition. In one implementation, two different halves of a transfer function corresponding to the amplitude characteristics of the amplifier are separately modeled and then combined to generate a control signal used to control a voltage-controlled attenuator that attenuates the input sign...

A signal to be amplified is provided in polar format comprising an amplitude component (210) and a phase component (212). The amplitude component (210) is used to bias the phase component (212). The gain of amplifier (220) depends upon the bias of the signal that it receives. Therefore, the bias given to the phase component (212) provides the envelope characteristics of the output signal (224) of amplifier (220). Both (or either) of the amplitude component (210) and the phase component (212) may...

A programmable logic device (PLD) with a programmable logic core, block memory, and I/O circuitry has one or more blocks of standard-cell logic (SLBs) that are integrated into the PLD design to enable each SLB to be programmably connected to any one or more of the programmable core, the block memory, and/or the I/O circuitry. The addition of standard-cell-based functional blocks creates a PLD with increased overall logic density, a net smaller die size per function, lowered cost, and improvement...

Multiple product terms (PTs) are combined with a multiple-input look-up table (LUT) to form a LUT-based Boolean term (LBT) that generates a Boolean output. Multiple LBTs are combined with one or more sum terms to form an enhanced generic logic block (EGLB) that can be programmed to operate, e.g., as a sum-of-products structure, where the EGLB structure can be repeated within a programmable logic device (PLD). Different multi-bit Boolean functions can be implemented in a single pass through each ...

In one embodiment, a method of transmitting data from a transmitter in a wireless local area network (WLAN), where the transmitter has a timer and a modem. The transmitter periodically transmits a transmission signal that includes a timestamp field that includes a timestamp for synchronizing a receiver timer in a receiver of the WLAN. The timestamp, which represents a value within the count sequence of the transmitter timer, accounts for delays in the modem.

Roughly described, a packet switching fabric contains a separate queue scheduler for each combination of an input module and a fabric output port. The schedulers may also be specific to a single class of service. Each queue scheduler schedules its packets without regard to state of other input queues and without regard to packets destined for other output ports. In an aspect, the fabric manages per-flow bandwidth utilization of output port bandwidth capacity by monitoring the same and asserting ...

A static latch circuit is used to suppress crosstalk glitch in a synchronous digital integrated circuit. A static latch is inserted into a selected victim net, and the net is examined if crosstalk glitch induced in the selected victim net is sufficiently suppressed. If not, then the selected victim net is examined to check whether the crosstalk glitch is primarily due to propagated noise from an earlier stage or due to noise injected in the selected victim net. If the crosstalk glitch is propaga...