Nonvolatile integrated circuit memory devices, such as EEPROMs, use unselected shared latching sense amplifiers to latch data from memory cells which are to be reprogrammed after a page erase, and to resupply the latch data to the memory cells which are to be programmed after erase, to thereby internally reprogram the latched data into erased memory cells after page programming. Transferring circuits and methods are provided for transferring data between shared latching sense amplifiers to permi...

A process for making a fluoropolymer is disclosed. The process comprises solubilizing a fluoromonomer in solvent comprising a carbon dioxide fluid, and then polymerizing the fluoromonomer to produce a the fluoropolymer. A preferred solvent for carrying out the process is supercritical carbon dioxide; preferred fluoromonomers for carrying out the process are fluoroacrylate monomers such as 1,1-dihydroperfluorooctyl acrylate. The polymerization step is preferably carried out in the presence of an ...

A method of facilitating the clearance of retained pulmonary secretions in a subject using lantibiotics is disclosed. The method comprises administering to the lungs of the subject an effective amount of a lantibiotic. The lantibiotic is preferably administered by topically applying it to the respiratory epithelia, such as by generating an aerosol thereof which is then inhaled by the subject. A preferred lantibiotic for carrying out the present invention is duramycin. The method may be used in t...

A liquid crystal display according to this invention has at least two repair lines. A first repair line crosses twice the data lines lying on the center portion of the substrate and once the some data lines which a second repair line crosses twice among the remainings. The data lines not lying on the center portion is shorter than the remaining data lines so that they do not cross the first repair line.

A method of forming a contact hole through an interlayer insulation layer in a semiconductor device using a sidewall spacer formed on the sidewalls of a pattern hole in a photosensitive film which serves as a mask to an anisotropic etching process used to form the contact hole.

A DRAM includes a refresh controller including a clock control section for producing a refresh mode signal in response to an external control clock signal, a refresh logic section for producing an enable signal in response to the refresh mode signal, a refresh counter for sequentially producing a first plurality of row address signals during an active period of a row address strobe signal in response to the enable signal, a row address buffer for producing a second plurality of row address signa...

A mobile radiotelephone is responsive to user entry of an extension such as the last four digits of a telephone number, to identify a prefix such as the first three digits of a telephone number, for the user-entered extension. By automatically identifying a prefix, the user need not enter all of the numbers for the destination telephone. A default automatic prefix may be stored and retrieved in response to user entry of an extension. Alternatively, in response to user entry of an extension, the ...

A conductive planarization layer, preferably a doped polysilicon layer, is used as a planarization layer for forming a conductive interconnect, such as a memory device bit line, thereon. Etching of the doped polysilicon planarization layer may be accurately controlled to form a planarized layer of controlled thickness, without requiring high temperature reflow heating of boro-phospo-silicate glass which can degrade transistor parameters. In particular, an insulating layer is formed on spaced apa...

Nonvolatile integrated circuit memory devices having ground interconnect lattices are provided to have reduced lateral dimensions because the ground interconnect lines therein occupy less total area. With respect to integrated circuit memory devices containing NAND strings of EEPROM memory cells, the ground select electrodes for respective first and second pluralities of NAND strings (on a first side of a metal ground line) are joined together so that the number of ground select electrodes cross...

Power semiconductor devices having overlapping floating field plates include a primary field plate and a plurality of floating field plates which are formed on an electrically insulating region and capacitively coupled together in series between an active region of a power semiconductor device and a floating field ring. Preferably, the capacitive coupling is achieved by overlapping at least portions of the floating field plates. According to one embodiment, a power semiconductor device comprises...