A micro processor is connected to a switch operated voting panel and a vote selection indicating device. The voter-selected switch combination is converted to a digital code which is temporarily stored. The vote is recorded in a permanent form upon completion of voting in both a print-out and in an electronic memory. The electrical record can be connected to a communications system for remote tallying and continuous real-time remote readout. The automatic system is fully compatible with present ...

A differential input is applied to four bridge-connected field effect transistors. The bridge drives a differential common base transistor stage. The output can be either differential or single ended as desired taken from the transistor collectors. The circuit provides good common mode rejection and good differential response to signals over a common mode range that exceeds the voltage of the power supply.

In square wave signal processing, a plural signal combiner is provided with a reference input along with differential inputs for other signals to be combined. Each differential input terminal is provided with an emitter load by means of a plural emitter transistor connected to have a constant collector current. The combiner can process square wave signals to extract phase information.

A driver circuit in which the output current is limited to a particular value. A very low value resistance in the output stage senses the current and modulates the conduction to a diode-amplifier combination. The combination employs ratioed emitter areas and currents and can respond to potentials at P-N junction contact potential level. The circuit has a dynamic voltage range that extends to within almost the emitter-collector saturation of a single transistor of zero.

A plastic pin grid array package is detailed. Where the semiconductor device is mounted within a cavity in the printed wiring board, it is surrounded by a ring of holes that extend completely through the board. When the plastic housing is transfer molded around the face of the board, plastic will enter the holes thereby forming plastic pillars that lock the encapsulant to the board mechanically. When the package is flexed, the pillars will prevent any motion between the encapsulant and the board...

A process for forming an IC isolation trench pattern wherein the trenches have varying widths and are filled with near intrinsic single crystal silicon. Thus, the wiring that passes over the trenches has low capacitance and active circuit devices having improved high frequency performance can be fabricated into the silicon in the trenches. This increases the utilization of surface area thereby increasing active device density for VLSI applications.

A transfer molded plastic package having a cavity for accommodating a semiconductor chip is disclosed. A leadframe assembly process is shown wherein the leadframe finger pattern is provided with a resilient or elastic O-ring bead. Top and bottom housing plates which have dimensions that are larger than the bead form the upper and lower surfaces of the package. These plates can be formed of any suitably rigid material. They may be composed of ceramic in low power devices. For high power operation...

An integrator circuit is connected to a capacitor that is to be measured and the capacitor driven by a read pulse. A first switch grounds the integrator input between read pulses and a second switch applies a bias input to the integrator. The bias is selected so that the integrator is active and its output high. Then, during the read pulse interval, the integrator will hold its input close to ground so that the capacitor to be measured will transfer a maximum charge to the integrator feedback ca...

A process for creating self-aligned vertically arrayed planar transistors. The preferred embodiment relates to the simultaneous fabrication of both NPN and PNP planar vertically arrayed transistors in a conventional monolithic, epitaxial, PN junction isolated, integrated circuit. A field oxide is employed to surface isolate the devices and assist in the self-alignment improvement.

A monolithic silicon integrated circuit chip is provided with a conductive passivating coating over the metal bonding pads. The coating is composed of doped polysilicon or metal silicide. Such materials provide a self-passivating, non-corrodable surface capable of forming a conventional eutectic bond to a connecting wire. A moat is etched through this layer outside the confines of the bonding pad so that they can be electrically isolated. Eutectic wire bonds are then made to the coating where th...